Micronas Digital TV Engine

MDE9500

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Micronas Digital TV Engine Features:

Single-chip DVB decoder including transport stream demultiplexer, common descrambler, and MPEG audio and video decoder
Designed for IDTV (50 Hz and 100 Hz) and STB applications
MHP-compliant graphics architecture
Embedded 32-bit system CPU (108 MHz)
Dual transport stream input with CI support for two slots (MDE9500)
On-chip SDRAM allows DVB decoding and IDTV operation without external DRAM
Dual internal/external SDRAM memory architecture with up to 512 Mbit external SDRAM
IDE hard disk interface (MDE9500)
Interface to external 1394 link layer device (MDE9500)
EJTAG interface for CPU and audio DSP debugging
Integrated digital multistandard slicer for analog data service support (Teletext, NexTView, TeleWeb, WSS, VPS, CC)
PAL/NTSC/SECAM color decoder CVBS encoder
Reinsertion of VBI data in CVBS output
2-D graphic accelerator (32-bit)
Six independent video/graphic layers
2H OSD output (master/slave)
Edge-adaptive anti-flicker filter for graphic images
Programmable spatial video scaler
Digital video output (CCIR/ITU-R 656)
Digital audio outputs (6-channel I2S, S/PDIF)
One external 20.25-MHz crystal
3.3V and 1.8V power supplies
PBGA329 package

The MDE9500 is the flagship of a single-chip DigitalTV mixed-signal decoder family.

It integrates a 32-bit microcontroller, a DVB-compliant MPEG-2 processing (system audio and video), SDRAM, a high-performance graphic system, and components like analog color decoder, color encoder, and VBI data slicer for full support of analog TV broadcasting.

The MDE9500 integrates all interfaces to support hybrid digital and analog TV chassis applications without external glue logic.
Its interfaces and system partitioning are adjusted to other TV system components like demodulators, up-conversion ICs, and deflection controllers, so that a complete digital TV system solution can be provided based on Micronas ICs. The variety of interfaces makes this IC very attractive for hybrid single-scan and double-scan IDTVs. Two transport stream interfaces allow direct connection of any combination of DVB-S/C/T channel decoders or other transport stream sources.

The MDE9500 is a scalable hardware solution with on-chip DVB transport stream demultiplexing, MPEG-2 MP@ML decoding, system CPU, HDD interface, and multilayer display generator. The particular feature of integrated SDRAM enables single-chip IDTV concepts, from a low-cost free-to-air model up to a full DVB-MHP version with external SDRAM and hard disk recording of video and services - all of this based on the same hardware and software architecture.

Micronas DigitalTV Engine:
Part Number	Description	Package
MDE9500	Micronas DigitalTV Engine	PBGA329

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