Display Processor and ScalerDPS9455B [IN PROGRESS]Display Processor and Scaler Features:
System Architecture
The Figure shows the block diagram of the DPS9455B. The device has digital outputs. In principle, the device comprises three major functional and clock domain parts. Functional Parts Video input processing Scaling Display processing Clock Domains ITU domain Input domain Display domain (compare the block diagram and the different shaded areas). Video Inputs Digital input for 50/60 I or 50/60 P signals in ITU-656 (8 bit) or ITU-601 (16 bit) 3 x 8 bit YCrCb /RGB input 2 analog RGB/YCrCb inputs for Teletext, graphics, 480p, 576p, 1080i and 720p 4 built-in ADCs (8-bit) for RGB + Fast- Blank with 81 MHz sampling rate PC input up to XGA at 75 Hz and WXGA at 60 Hz Separate HS and VS (2 x ) inputs Sync Processing 3-level sync-separation for 1080i and 720p HS and VS outputs to synchronize the ext. analog RGB/YCrCb source in the softmix mode (see display modes) Ext. OSD source Display Modes Digital mode: video from the digital input Analog mode: video/graphic/teletext from the analog RGB/YCrCb input Softmix mode: soft mixing of the video and component input OSD signals can be inserted digitally Video Processing Full 4:4:4 processing RGB-to-YCrCrb conversion Brightness, Contrast, Saturation for analog component input Dynamic contrast improvement (DCI) Black level expander (BLE) Luma & chroma transition improvement Dynamic peaking Brightness, Contrast, Saturation, Tint Programmable YCrCb-to-RGB matrix Programmable characteristic on R,G,B, for gamma-correction, Blue-stretch, White-drive Dithering for 8- to 6-bit digital outputs Display Format Processing Prescaling of the input signal: horizontal scaling factor: 1.0 ... 1/64 Upscaling of the output signal: horizontal scaling factor: 1 ... 4 (5-zone panorama generator) Vertical scaling factor: 0.5 ... 4 Deinterlacing with line-doubling/upscaling OSD Digital RGB input (6 or 12 bit / pixel) 64 entry CLUT with 12-bit colors Picture frame and testpattern generation Half-contrast switch (0, 25%, 50%, 100%) Display Resolutions 640 x 480 (VGA; 4:3 panel) 852 x 480 (W-VGA; 16:9 panel) 800 x 600 (SVGA) 1024 x 768 (XGA) 1365 x 768 (W-XGA) Output Interface 2 x 18- or 24-bit RGB output: dual-pixel mode Programmable panel control signals Miscellaneous Up to 2 PWM outputs Up to 8 general purpose I/Os I2C interface (400 kHz) JTAG boundary scan interface 1.8V and 3.3V supply PMQFP144 package that the manufacturer's original data is referred to at all times |
Wireless
Audio Visual
Video Signal Processing
Chip